Compressive Sensing hardware in 1D signals

Sergio Pinto, Luis Mendoza, Hernando Velandia, Valentin Molina

Abstract


This paper shows the implementation in Hardware of the signal processing techniques known as: Compressive Sensing (CS), Compressed Sensing or Compressive Sampling. The technique CS work in a sparse signal space: the methods used in this article are: Derivative (D), discrete Fourier (DFT), discrete cosine (DCT) and discrete Wavelet (WDT) Transform. Additionally, the electronic circuits for acquire voice, electromyography and electrocardiogram signals, were implemented. The application of CS in these signals showed significant results, which promise a substantial increase in transmission speed and the development of new technologies for communications in the world. The hardware implementation was realized in an FPGA SPARTAN 3E and 18F4550 PIC microcontroller. The results showed that is possible to reconstruct 1D signals, breaking the theory of Shannon and Nyquist. Also, we concluded that the FPGA implementation is faster and allows compression ratios higher than with the microcontroller.

 


Keywords


Compressive sensing; Sparse signals; Compression; Compressive sensing hardware

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DOI: http://dx.doi.org/10.18180/tecciencia.2015.19.2

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